I’m a final-year electrical engineering Ph.D. student at Stanford University interested in systems and networking.
Earlier in my PhD, I worked with Phil Levis and Chris Ré on building hardware component knowledge bases using training data generation and multi-task learning.
Now, I work with Phil Levis and Keith Winstein exploring ultra-low-latency, gaze-contingent video compression.
I will be joining Google full-time as a software engineer after graduation.
Education
Dates | Degree |
2015 – 2021 | Ph.D. in Electrical Engineering Stanford University |
2015 – 2017 | M.S. in Electrical Engineering Stanford University |
2010 – 2015 | B.S. in Computer Engineering Brigham Young University, Summa Cum Laude |
Skills
- Programming: Python, C, Rust, LaTeX, Make
- Systems/Tools: Vim, Git, Linux, Perforce, AWS, GCE, CI/CD
Industry Experience
Dates | Role |
2020-06 – 2020-09 | Software Engineering Intern, Google
- Added support for TCP tx zerocopy (tx0cp) using io_uring in the Linux kernel.
- Profiled and optimized benchmarks to demonstrate an 18% improvement in CPU efficiency for tx0cp via io_uring.
|
2019-06 – 2019-09 | Research Intern, Google
- Explored BBRv2 for many-to-one data center traffic, reducing latency and retransmit rates by 30% and 80%, respectively.
- Open sourced Transperf, a transport protocol performance tool for testing TCP over emulated network scenarios.
|
2017-06 – 2017-09 | Software Engineering Intern, NVIDIA
- Helped develop a new system-level Windows driver for gaming laptops.
- Designed and implemented secure APIs in kernel-space C code.
|
2015-04 – 2015-06 | Software Engineering Intern, Novi Security
- Prototyped embedded software architectures to analyze and improve testability.
- Built infrastructure for continuous integration and test-driven development.
|
Research Experience
Dates | Role |
2015-09 – Present | Ph.D. Research Assistant, Stanford University (Advisors: Phil Levis and Keith Winstein) Area: Systems and Networking
- Current: Ultra low latency foveated video compression.
- Past: Generating hardware component knowledge bases with training data generation and multitask learning (w/ Chris Ré).
|
2014-04 – 2015-06 | Undergraduate Research Assistant, Brigham Young University (Advisor: Mike Wirthlin) Area: Embedded Systems, FPGA Reliability, and Fault Injection
- Implemented VHDL components used in FPGA reliability experiments.
- Created standalone JTAG fault injection tool for radiation testing in C/C++.
|
Teaching Experience
Semester | Course |
W2019 | Introduction to Computer Networks (CS 144), Graduate CA Stanford University |
W2016 | Program Analysis and Optimizations (CS 243), Graduate Grader Stanford University |
W2014 | Data Structures and Algorithms (CS 235), Undergraduate TA Brigham Young University |
Publications
Select publications, in reverse chronological order.
Peer-Reviewed Papers
- Creating Hardware Component Knowledge Bases with Training Data Generation and Multi-task Learning, ACM TECS 2020
L. Hsiao, S. Wu, N. Chiang, C. Ré, and P. Levis
[paper]
[code]
[data]
- Automating the Generation of Hardware Component Knowledge Bases, LCTES 2019
L. Hsiao, S. Wu, N. Chiang, C. Ré, and P. Levis
[paper]
[slides]
[poster]
[code]
[data]
- Fonduer: Knowledge Base Construction from Richly Formatted Data, SIGMOD 2018
S. Wu, L. Hsiao, X. Cheng, B. Hancock, T. Rekatsinas, P. Levis, and C. Ré
[paper]
[code]
- Smart Contracts for Machine-to-Machine Communication: Possibilities and Limitations, IOTAIS 2018
Y. Hanada, L. Hsiao, and P. Levis
[paper]
- Estimating Soft Processor Soft Error Sensitivity through Fault Injection, FCCM 2015
N. Harward, M. Gardiner, L. Hsiao, M. Wirthlin
[paper]
- A Fault Injection System for Measuring Soft Processor Design Sensitivity on Virtex-5 FPGAs, FASA 2014
N. Harward, M. Gardiner, L. Hsiao, M. Wirthlin
[paper]
Preprints
- The Price of Free Illegal Live Streaming Services, arXiv 2019
H. Ayers and L. Hsiao
[paper]
- TCPTuner: Congestion Control Your Way, arXiv 2016
K. Miller and L. Hsiao
[paper] [code]
Past Projects